One embodiment of the present invention relates to a programmable device for increasing memory cell design yield. More specifically, one embodiment of the present invention relates to fuses that are both hardware and software programmable, and adapted to increase design yield in memory cells.
Memory structures containing multiple memory cells have become an integral part of modern VLSI systems. Although typically it is desirable to incorporate as many memory cells as possible into a given area, memory cell density is usually constrained by other design factors such as layout efficiency, performance, power requirements, and noise sensitivity.
Highly integrated, high performance components for such VLSI systems like memory structures require complex fabrication and manufacturing processes. These processes may experience unavoidable parameter defects that can impose unwanted physical defects on the units being produced. Redundancy is added or built into memory structures to enhance yield, hopefully providing a one-for-one replacement for a failed part or subsystem. As the memory cells continue to push design limits, the overall yield per memory cell unit area tends to decrease.
Currently fuses are used to indicate or encode those rows or columns of memory cells that are to be shifted out of operation, so that only those memory cells without flaws are useable. These fuses are generally laser programmable or electrically one-time programmable fuses. During manufacturing, the fuses are blown, using a laser device or electric pulse, to indicate those locations that are unusable.
It should be appreciated that this blowing a fuse using a laser device or electric pulse is a one-time operation. Once the laser programmable or electronically one-time programmable fuse is blown, it cannot revert to its original state.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.